Practice that adds up to a skill.

Promise

Practise with about 140 short designs, each with a testbench, grouped by topic so you can drill one skill at a time.

Prerequisites

VLG-01 for the first group; the rest in step with the other courses.

Units

Labs

Each lab names its environment and a pass check. Labs are not marked complete on "it ran" — the pass check has to hold.

Lab	What you do	Environment
VLG-07ach examples, group 2	Procedural examples with testbenchesPass check: All pass	sim180 min
VLG-07bch examples, group 5	Primitive and timing examplesPass check: All pass	sim180 min
VLG-07cch examples, group 8	Application projectsPass check: Project runs	sim240 min
VLG-07dch examples, group 9	Memory and arithmetic examplesPass check: All pass	sim180 min

Outcomes

• I can write a testbench for any example in my group and show the waveform that proves it.
• I can rewrite an example in a second style and explain the difference.
• I can build one application project end to end.

Also in

• Digital Design with Verilog

How it runs

Work through the units in order. Each unit groups the chapters of the study guide with its share of the labs. You can start any time; there is no cohort date and nothing expires.

Labs run in a VM, a container, a simulator or on real hardware, and the card above names which. Where a lab needs hardware — an RDMA NIC, a programmable switch model, an FPGA — there is a simulator fallback so you are never blocked by equipment.

Questions