DPK-01 · Packet Processing with DPDK
Packets at line rate, with the kernel out of the way.
Learn the core libraries that make DPDK fast, then put them to work in a VPN gateway.
You build: a VPN gateway on DPDK's core libraries.
Prefer to be taught it live? DPDK & Userspace Kernel Bypass (NET-210, 3 days) is the same material delivered in a scheduled cohort by an instructor, in person or online. See the live course · Live dates
In final review — the chapters for this course are still being finalised.
Promise
Build high-speed packet applications on DPDK's core libraries and finish with a VPN gateway.
Prerequisites
PDP-01; C.
Units
1. Overview and setup ch 01–03
the ecosystem, the environment, core architecture.
2. Memory and queues ch 04, 08, 09
memory management, the lock-free ring, memory pools.
3. Core development practice ch 05–07, 14, 16, 17, 20, 24, 25, 29
the main development workflow, with worked examples.
4. Timers, distribution, flows ch 10–12
timers, the distributor, flow tables and ACLs.
5. Reassembly and virtualization ch 13, 15, 18
fragmentation, virtual devices, multi-process applications.
6. Offload and smart NICs ch 19, 26
hardware offload and SmartNIC integration.
7. Applications ch 21–23, 28
a gateway, a load balancer, protocol-stack integration, security middleware.
8. Capstone ch 30
high-performance VPN gateway.
Labs
Each lab names its environment and a pass check. Labs are not marked complete on "it ran" — the pass check has to hold.
| Lab | What you do | Environment |
|---|---|---|
| DPK-01ach 02 | Set up DPDK, bind a NIC or use `net_tap`Pass check: `dpdk-testpmd` starts and reports ports | vm60 min |
| DPK-01bch 08–09 | Ring and mempool receive loopPass check: No mbuf leaks after 10 million packets | sim90 min |
| DPK-01cch 12 | ACL on the fast pathPass check: Matching flows dropped, counts correct | sim90 min |
| DPK-01dch 21 | Simple L3 forwarderPass check: Throughput measured and recorded | sim90 min |
Outcomes
- I can initialize EAL and bind NICs with the correct drivers.
- I can size and use mempools and rings for a burst-based receive loop.
- I can implement an ACL and a flow lookup on the fast path.
- I can profile a DPDK application and find its bottleneck.
Also in
How it runs
Work through the units in order. Each unit groups the chapters of the study guide with its share of the labs. You can start any time; there is no cohort date and nothing expires.
Labs run in a VM, a container, a simulator or on real hardware, and the card above names which. Where a lab needs hardware — an RDMA NIC, a programmable switch model, an FPGA — there is a simulator fallback so you are never blocked by equipment.
Questions
Do I get a certificate?
You get a completion record for the course. Path badges and project credentials are earned by passing the labs and the project review, not by attendance.
Can my team take this together?
Yes — and if you would rather have it delivered live, with the instructor in the room, this course also exists as a scheduled live cohort. See the live dates.
How long does it take?
≈ 30 h of study including the labs. Most engineers take it part-time over a few weeks.