AIC-101 · GPU & AI Compute · Foundation
Foundations of AI Compute & GPU Architecture — full syllabus
The architecture, memory hierarchies and fabrics underpinning modern accelerated computing: CPU-GPU topologies, SIMT execution, HBM, NVLink, and datacenter networking.
Duration4 full days in person · 8 half-days online
Cohortmax 14 in person · 20 online
Pricefrom SAR 9,750 in person · local pricing per city
Delivery35% principles · 20% guided investigation · 45% engineering studio
Prepares for the NVIDIA NCA-AIIO certification.
Who this course is for
Engineers moving into GPU/AI infrastructure who need deep, defensible systems fundamentals: how CPUs, GPUs, memory hierarchies, and high-speed fabrics actually behave underneath PyTorch, vLLM, and distributed training jobs.
Prerequisites
- Basic Linux command-line proficiency
- Some exposure to compiled code (C/C++ helpful)
- No prior GPU programming required
Course outline
Day 1 — Host architecture & OS fundamentals for AI
- Fetch/decode/execute and why memory bandwidth dominates modern workloads
- CPU cache hierarchies (L1/L2/L3), miss patterns, and cacheline false sharing
- SIMD vector processing: AVX-512, NEON, and Arm SVE execution
- Multi-socket NUMA topologies, distance matrices, and CPU-GPU affinity
- Processes, threads, CPU scheduling, and virtual memory page table mechanics
- Direct I/O, page cache, huge pages (2MB/1GB), and the Linux OOM killer
Day 2 — GPU microarchitecture & memory systems
- CPU vs GPU architecture philosophy: low-latency cores vs massive SIMT throughput
- SIMT execution model: warps, wavefronts, branch divergence, and warp scheduling
- GPU memory hierarchy: registers, shared memory, L2 cache, GDDR, and HBM3/HBM3e
- Memory coalescing rules, bank conflicts, and achieving theoretical DRAM bandwidth
- Architecture progression: Tensor Cores (Volta to Blackwell), TF32, Transformer Engine, FP4/FP8
- AMD CDNA / MI300X architecture: unified APU memory, matrix cores, and Infinity Fabric
Day 3 — Interconnects & multi-GPU topologies
- PCIe Gen4 through Gen6: lane bandwidth, root complexes, switches, and tree depth
- NVLink 3.0/4.0/5.0 and NVSwitch crossbars: HGX and DGX architecture topologies
- Compute Express Link (CXL): CXL.io, CXL.cache, and pooled CXL.mem fabrics
- Pinned (page-locked) host memory, GPUDirect P2P, and DMA transfer mechanics
- Unified Memory architectures: CUDA UMA, ROCm UMA, and hardware page faulting
Day 4 — Cluster networking & node procurement audit
- Datacenter network fabrics for AI: spine-leaf topologies and non-blocking fat trees
- InfiniBand vs RoCEv2: flow control (PFC), congestion management (ECN/DCQCN)
- First look at kernel bypass, RDMA queue pairs, and NCCL collective primitives
- Sizing math for AI infrastructure: balancing compute, HBM capacity, and network bandwidth
Hands-on labs
- Lab: map server topology using lscpu, numactl, nvidia-smi topo -m, and lspci -tv to trace the full PCIe/NVLink graph
- Lab: benchmark memory bandwidth across DRAM, PCIe, and GPU HBM, identifying the NUMA cross-traffic cliff
- Lab: measure warp divergence and uncoalesced memory penalties on real GPU kernels with Nsight Compute
- Lab: configure huge pages and pinned host memory, measuring the DMA throughput difference to GPU memory
- Lab: capture and analyze inter-node RDMA traffic and measure collective latency with iperf3 and perftest
Capstone project
Perform a comprehensive architectural audit and procurement specification for an 8-GPU AI training node: map the physical topology, calculate the bandwidth roofline across each memory tier, identify configuration bottlenecks that starve GPUs, and deliver a procurement-ready specification with bandwidth math attached.
What you leave with
- A rigorous mental model of the hardware and OS stack underneath PyTorch and vLLM
- Fluency with topology and profiling tools: nvidia-smi, lstopo, lspci, and Nsight
- The ability to read GPU whitepapers and calculate realistic throughput ceilings
- Preparation toward the NVIDIA Certified Associate: AI Infrastructure and Operations (NCA-AIIO)
Upcoming dates
| Dates | Where | Seats | Early bird | Regular | |
|---|---|---|---|---|---|
| 25 Oct – 28 Oct 20264 full days | RiyadhIn person · KAFD Conference Centre | 11 of 14 | — | SAR 9,750 | |
| 1 Nov – 4 Nov 20264 full days | Kuwait CityIn person · Al Hamra Tower | 6 of 14 | — | USD 2,600 | |
| 8 Nov – 11 Nov 20264 full days | MuscatIn person · Knowledge Oasis Muscat | 11 of 14 | — | USD 2,600 | |
| 8 Nov – 17 Nov 20268 half-days | Gulf bandLive online · 09:00–13:00 GMT+3 | 3 of 20 | — | US$1,850 | |
| 9 Nov – 12 Nov 20264 full days | OttawaIn person · Kanata North Tech Park | 6 of 14 | — | CAD 3,540 | |
| 16 Nov – 19 Nov 20264 full days | TorontoIn person · MaRS Discovery District | 11 of 14 | CAD 3,190until 17 Oct | ||
| 16 Nov – 25 Nov 20268 half-days | Europe bandLive online · 09:00–13:00 CET | 8 of 20 | US$1,660until 17 Oct | ||
| 16 Nov – 25 Nov 20268 half-days | Americas bandLive online · 13:00–17:00 ET | 13 of 20 | US$1,660until 17 Oct | ||
| 23 Nov – 26 Nov 20264 full days | LondonIn person · Shoreditch Works | 6 of 14 | GBP 1,830until 24 Oct | ||
| 23 Nov – 26 Nov 20264 full days | BerlinIn person · Factory Görlitzer Park | 11 of 14 | EUR 2,150until 24 Oct |
Book a seat, or bring this course to your team
Seats can be reserved online; private delivery runs on-site or live online, adapted to your stack.
Questions about fit or prerequisites? Email [email protected]. To save this syllabus, print this page to PDF from your browser.